Инженеры борются с помехами и потерей энергии в беспроводных чипах для IoT

Radio frequency interference, power efficiency and real-time performance all affect wireless SoCs, writes Samudrapom Dam. Integrated wireless system on chip architecture, image generated by Gemini AI Wireless system-on-chips (SoCs) are the core of modern embedded devices, enabling compact designs with integrated connectivity such as Wi-Fi and Bluetooth Low Energy. However, engineers face growing challenges related to radio frequency (RF) interference, power efficiency and real-time performance as these radios share limited spectrum and hardware resources. Issues such as connection dropouts, increased latency and unexpected battery drain are common in consumer and IoT products. Understanding these problems and exploring practical design strategies are essential to improve coexistence, reliability, and energy efficiency. Wireless SoCs Wireless SoCs, comprised of radios, memory, interfaces, processors, power management and peripherals, are preferred in embedded devices due to their low power consumption, high functionality and space savings. Increasing multi-protocol support requirements to meet diverse IoT device needs is driving demand for wireless SoCs. Chipmakers keep pace with evolving existing standards and new wireless standards, including 802.15.4, ZigBee, Wi-Fi, Bluetooth Classic, Bluetooth LE, Thread, Z-Wave and Matter. Wireless SoCs are addressing wireless design’s key technical challenges while simplifying development through this multi-protocol support and integration. SoC manufacturers’ reference designs and comprehensive ecosystems shorten the design cycle and reduce design risk. Wireless SoC components vary depending on end applications and supported protocols. Modern wireless SoCs embed multi-layer hardware and software protections to protect personal data and intellectual property as security is now a key requirement. This enables secure deployment across IoT applications such as smart homes, metering, building automation and fitness devices. RF coexistence in multi-protocol systems RF coexistence allows several wireless protocols to operate simultaneously on shared RF front ends without causing harmful interference. In multi-protocol systems, managing interactions between technologies such as Wi-Fi and Bluetooth LE is crucial to ensure reliable performance and prevent connection loss. Effective coexistence ensures that multiple 2.4 GHz technologies, including Wi-Fi, Zigbee, Thread and Bluetooth, can access the same spectrum band without interfering with one another. A sophisticated Wi-Fi radio comprises two identical dual-band (2.4 and 5GHz) transceivers. Interference degrades performance by causing message failures, increased retries, reduced device responsiveness and higher power consumption. Conventionally, coexistence relied on hardware design strategies and protocol features such as collision avoidance and message retries. However, modern IoT gateways and hubs support greater throughput, transmit at higher power and integrate multiple radios, making coexistence more challenging. Interference mitigation in wireless communication employs techniques such as frequency hopping and spread spectrum. Power control limits interference by optimising transmission strength, particularly in cellular systems. Beamforming improves performance by directing signals towards intended receivers while minimising unwanted interference. A practical example is the 6GHz band, where unlicensed technologies such as Wi-Fi 6E coexist with licensed services through tiered spectrum access. Antenna tuning, PCB trace routing and ground plane isolation Effective wireless SoCs depend on the integration of antenna design and PCB layout to achieve reliable and efficient communication. Antenna tuning, precise PCB trace routing and careful ground-plane isolation are crucial to maintaining signal quality across diverse operating conditions. Antennas directly influence link quality and data throughput in wireless communication systems, making high efficiency and advanced functionalities crucial. Antenna design for wireless SoCs has evolved to include pattern diversity, which reduces signal correlation in multiport systems and improves data throughput while maintaining balanced antenna gain. The development of antenna-in-package (AiP) technology has been enabled by ball grid array packages that provide sufficient space for antenna integration. AiP technology balances performance, size and cost, and has been widely adopted. Co-design of the antenna and package minimises routing losses and optimises the placement of radiating elements, feeding networks, ground planes, shielding structures and metal fill. Ground plane design is another key AiP performance aspect. In AiP modules the ground plane serves as an antenna reflector and as a return path for die currents. While a large, continuous ground plane improves electrical performance, it degrades mechanical reliability due to thermal-mismatch-induced stress. As a result, meshed and defected ground planes are employed. Defected ground planes introduce bandgap characteristics that suppress surface waves and reduce mutual coupling in antenna arrays. A major challenge in AiP module design is minimising signal reflection and loss at the die–package–antenna interface within the feed network, as mismatches degrade overall performance. The feed network consists of pads, bonds, traces and vias. Die and package pads are arranged in ground–signal–ground/ground–signal–ground–signal–ground configurations to support single-ended/differential antennas. Electrical connections are made using wire bonding/flip-chip techniques, with wires over-moulded and bumps under-filled for reliability. Package traces from coplanar waveguides may transition to microstrip or stripline lines and use vias or ground openings to efficiently excite the antenna. An efficient approach to antenna design within AiP modules is demonstrated by modelling stacked microstrip patch antennas as second-order bandpass filters. In this method, the filter input functions as the antenna feed, while the output corresponds to far-field radiation. This synthesis-based approach requires a few iterations and is well suited for compact AiP implementations. A demonstrated 28GHz design achieved wide impedance and gain bandwidths within a compact footprint, validating this methodology’s effectiveness. Dynamic power scaling and connection stability Power management and dynamic scaling balance connection stability with energy efficiency. Effective low-power modes and wake-on-wireless techniques optimise battery life, as poor management can cause wearables to drain faster than expected. For instance, Zigbee, a low-power wireless communication technology, is designed for short-range data transfer and device control. Its mesh network topology enables devices to communicate directly/relay data through intermediate nodes, increasing range, reliability and scalability, with support for up to 65,000 nodes. Zigbee is suitable for applications requiring minimal power consumption and long battery life. Similarly, Z-Wave operates in the sub-1GHz band, reducing interference and improving range, which makes it popular in smart home applications. Long-range wide area network targets long-range, low-power communication and is commonly used in industrial IoT and smart city deployments. The thread emphasises IPv6-based communication for seamless internet integration. These protocols provide flexible, energy-efficient solutions for diverse IoT environments, balancing scalability, coverage, and power efficiency. Latency, jitter and real-time performance Latency and jitter affect responsiveness and reliability. Minimising communication delays and timing variations is essential for wireless communication. Low-latency communication is essential for applications requiring real-time data processing and rapid responses to environmental changes. Designing embedded systems/devices with ultra-low latency has challenges in hardware and software. Wireless channels are unpredictable, with interference, multipath fading and packet loss causing variable delays and repeated transmissions. High frequency RF transceiver and antenna array, image generated by Gemini AI Additionally, embedded devices operate under strict limitations in processing power, memory and energy. Designers must balance performance and power consumption as faster processors can reduce processing latency but increase energy usage. This trade-off is particularly important for battery-powered/energy-harvesting devices, where both power efficiency and real-time performance are important. In ultra-low-latency embedded system design, the microcontroller/microprocessor selection determines system performance, with high clock speeds and short instruction pipelines preferred to reduce delay. Modern low-latency transceivers support advanced modulation schemes, fast switching between transmit and receive modes, and include hardware packet-processing accelerators to reduce communication delay. Memory architecture influences system responsiveness: fast, low-latency memories enable quick data access and improved performance. Specific tasks can be assigned to dedicated hardware accelerators/coprocessors to free the main processor for time-critical operations. Improved signal quality through antenna diversity techniques such as multiple-input multiple-output/directional antennas reduces retransmissions and overall communication delay. Impact of EMI, shielding and impedance mismatch Wireless SoCs experience performance and reliability issues due to EMI, inadequate shielding and impedance mismatches. The growing reliance on electronic devices has increased their exposure to electromagnetic waves (EMWs), making EMI a significant challenge. EMI occurs when external EMWs disrupt normal electronic operation, including sources such as radio transmissions, mobile phones, power lines, microwaves and industrial equipment. The EMI impact depends on the wave’s type, strength and frequency, and ranges from minor signal distortion to serious device malfunctions. Communication systems are particularly vulnerable to EMI, as it can introduce noise, weaken signals and cause frequency shifts that interfere with synchronisation. Signals that are already distorted are more susceptible to further degradation, leading to higher error rates and reduced performance. Mobile devices, Wi-Fi and Bluetooth systems experience dropped calls, slow data rates, or reduced accuracy due to EMI. To address these issues, mitigation strategies such as electromagnetic shielding (Faraday cages), proper grounding, filtering and the use of shielded/twisted-pair cables are essential. Fibre-optic cables are effective because they are immune to EMI. Network design choices, including transmission power, equipment placement and distance from high-voltage sources, also play a critical role. Carbon-based nanomaterials such as graphene and carbon nanotubes are suitable EMI shielding materials due to their high conductivity, strength and stability. Compared to conventional metallic fillers such as copper, carbon materials offer better weight efficiency, corrosion resistance and absorption performance. Wireless SoCs in embedded devices face challenges such as RF coexistence, power efficiency, latency and EMI. Addressing these issues requires careful antenna and PCB design, advanced interference mitigation, dynamic power management and protocol selection. Holistic hardware–software co-design is essential to ensure reliable, low-power, and real-time wireless performance in modern IoT devices. Samudrapom Dam is a freelance writer See: Analogue v digital RF-over-Fibre: technical trade-offs